Link to the code: Zae-Project / arkspace-core

Neuromorphic Correlates of Consciousness as Hardware Specification: What NCAC Means for Satellite Processor Selection

Hardware selection for orbital AI nodes is currently driven by three criteria: radiation tolerance, power efficiency, and compute throughput. A 2024 paper by Anwaar Ulhaq proposes a fourth: neuromorphic correlates of artificial consciousness (NCAC), a framework that identifies the computational properties a system needs to exhibit consciousness-like processing, drawing directly from the neural correlates of consciousness (NCC) in neuroscience.

The full analysis of NCAC’s theoretical foundations is at theconsciousness.ai. This article treats the framework as a hardware specification document and evaluates current and near-term satellite processor candidates against its requirements.

The Four NCAC Correlates

Ulhaq’s framework identifies four structural properties that neuromorphic systems need to exhibit NCC-analogous behavior.

Temporal dynamics. Biological neurons communicate through precisely timed spike trains. The timing of individual spikes, relative to each other and to oscillatory background activity, carries information that rate-based codes cannot represent. Neuromorphic hardware that supports temporal coding must implement spike-timing-dependent plasticity (STDP) and variable inter-spike interval computation at the hardware level, not through software approximations on top of matrix operations.

Sparse coding. At any moment, only a small fraction of neurons in a biological circuit are active. This sparsity is computationally significant: it reduces interference between stored representations, lowers energy consumption, and enables rapid pattern completion from partial inputs. Hardware sparse coding requires that inactive neurons consume near-zero power, which is achievable in analog neuromorphic designs but impractical in standard digital processors where idle cores still draw static power.

Local plasticity. Biological synaptic weights change based on local activity patterns at the synapse itself, without requiring a global error signal propagated from a centralized learning controller. This is architecturally different from backpropagation-based training, where every weight update requires information from the output layer. Local plasticity allows on-board adaptation without a training loop that requires ground uplink.

Recurrent connectivity. Consciousness-correlated brain regions are densely recurrently connected: outputs feed back to earlier processing stages at multiple timescales. Feedforward architectures, including most deep learning inference models deployed on current edge AI satellites, process information in a single forward pass. Recurrent connectivity requires hardware that supports feedback connections without the latency penalty that feedback introduces in synchronous digital systems.

Processor Comparison Against NCAC Correlates

ProcessorTemporal DynamicsSparse CodingLocal PlasticityRecurrent ConnectivitySpace TRLPower (typical)
Intel Loihi 2Yes (native SNN)YesYes (STDP)YesTRL 2-3 (not rad-hard)1-10W
CMU 22nm FinFET rad-hardPartial (SNN-adjacent)PartialPartial (hardware STDP under testing)YesTRL 4 (CubeSat 2026)2-8W
BrainScaleS-2 (analog)Yes (analog temporal)YesYes (on-chip)YesTRL 1-2 (not rad-hard)50-200mW
Xilinx/AMD Versal FPGANo (programmable, not native)NoNo (software only)EmulableTRL 7-815-50W
Nvidia H100 (GPU)NoNoNoNo (inference only)TRL 3 (Starcloud-1)300-700W
ARM Cortex-R (rad-hard)NoNoNoNoTRL 90.5-2W

The table reveals a structural split. Processors that satisfy NCAC correlates (Loihi 2, BrainScaleS-2) have not been radiation-hardened to operational space standards. Processors that are radiation-hardened to operational standards (ARM Cortex-R, radiation-hardened FPGAs) satisfy none of the NCAC correlates. The CMU 22nm FinFET design is the only candidate currently bridging this gap, with a 2026 CubeSat test scheduled to validate its performance in the LEO environment.

What Radiation Hardening Costs the NCAC Properties

The CMU radiation-hardened neuromorphic chip program addresses total ionizing dose (TID) tolerance and single-event upsets (SEU) through a combination of process hardening and circuit-level mitigation. The interaction between radiation hardening and NCAC correlates is not neutral.

Temporal dynamics are the most vulnerable NCAC property under radiation. STDP depends on precise spike timing at the nanosecond scale. A single SEU in the timing circuitry of a neuromorphic core corrupts the temporal relationship between spikes, which is informationally equivalent to randomizing a subset of synaptic weights. Error-correcting memory can protect stored weights, but the timing circuitry itself is harder to protect without sacrificing the analog precision that temporal coding requires.

Sparse coding is more radiation-tolerant. The binary distinction between active and inactive states is less sensitive to analog noise than temporal coding. Digital implementations of sparse coding survive radiation environments better than analog implementations, at the cost of some biological fidelity.

Local plasticity is moderately vulnerable. STDP requires tracking spike timing windows that span 10-100ms. Radiation-induced glitches within that window corrupt the plasticity update without necessarily disrupting the ongoing computation. Checkpoint-and-restore mechanisms can mitigate this, but they introduce latency that affects real-time adaptation.

Recurrent connectivity is architecturally preserved under radiation hardening, provided the physical interconnects are hardened. This is the most tractable NCAC property from a radiation engineering standpoint.

The Gap Relative to Current Edge AI Satellites

Edge AI satellite platforms from D-Orbit (AIX-1+) and STAR.VISION (STRING) achieve 150-300 TOPS using tensor processing architectures. These satisfy none of the four NCAC correlates. The performance figures are optimized for computer vision inference workloads, which are feedforward, rate-coded, and trained offline before deployment. These are the opposite of the NCAC requirements on every axis.

Starcloud-1’s H100 GPU achieves higher absolute throughput at 700W. For NCAC purposes, the H100 is in the same category as the STAR.VISION STRING: high-performance feedforward inference, zero neuromorphic correlates. The comparison between GPU-based and neuromorphic approaches for orbital AI is not primarily about TOPS. It is about the computational paradigm. A 300 TOPS neuromorphic chip processes information differently from a 300 TOPS GPU, even at identical throughput figures.

Path to NCAC-Compliant Orbital Hardware

The CMU 2026 CubeSat test is the first data point on whether any of the four NCAC correlates can be preserved through a radiation environment. The test will validate TID tolerance and SEU rate, but the more informative measurement will be whether STDP-based learning continues to function after accumulated radiation dose.

The two near-term paths toward NCAC-compliant orbital hardware are:

Radiation-hardening existing neuromorphic designs by moving them to hardened process nodes (22nm FinFET at CMU, potentially 12nm or 7nm in subsequent generations). This preserves the architecture but requires significant fabrication investment per design iteration.

Designing radiation tolerance into neuromorphic architectures from the substrate up, accepting that some NCAC fidelity will be sacrificed in exchange for radiation robustness. This produces hardware that is NCAC-approximate rather than NCAC-compliant, which may be sufficient for the relevant applications.

A third path, hybrid architectures pairing a radiation-hardened conventional processor for fault tolerance and system management with a partially hardened neuromorphic coprocessor for inference and adaptation, is what the CMU design approximates. Whether hybrid architectures preserve enough of the NCAC correlates to produce the computational behaviors the framework predicts remains an open experimental question.

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